During instruction selection, a compiler converts IR to assembly. In the case of LLVM’s DAG-to-DAG ISel, the source MIR DAG is converted to a DAG whose opcodes are actual machine instructions. Each CPU manufacturer needs to define custom patterns (DAG-to-DAG transformations) and which CPU features are required for each pattern. During compilation, the instruction selector will choose more specific transformations (e.g., condensing a slurry of instructions into one architecture-specific instruction) over simpler ones.